What is the effect of the load capacitance of the crystal on the size of the crystal frequency point?

Answer: Crystal oscillator (Oscillator) does not need capacitor, crystal (Crystal) needs capacitor.

The relationship between the actual frequency and the nominal frequency of the crystal oscillator: Fx = F0 (1C1/(C0CL)) (1/2);

And CL = Cg * Cd/(Cg Cd) Cs; Where Cs is the stray capacitor, Cg and Cd are the two capacitors added externally to us, usually everyone has the same value, and their pairs are connected in series and the stray capacitor is the load capacitor CL of the crystal oscillator.

There is no need to think about the specific formula. We can know from it that the reduction of load capacitance can make the actual frequency Fx larger. Only Cg and Cd can be changed. Through preliminary calculation, it is found that CL can be changed by 1pF and Fx can be changed by several hundred Hz.

The original circuit uses two capacitors of 33pF, which are 16.5pF in parallel. Our patch capacitors are only 27pF,33pF and 39pF, so we choose 27pF and 39pF in parallel, and the capacitor is 15.95pF. After the capacitor is welded, the measurement is more than 200Hz larger than the original, falling within the design range.

Conclusion: The two capacitors on the crystal oscillator circuit can be unequal. The oscillation frequency of the crystal oscillator can be fine-tuned by fine-tuning the value of the capacitor. However, if you measure several crystal oscillators, the frequency is large or small, and the offset is large, then the crystal oscillator is unqualified.

The load capacitance mentioned in the datasheet of the crystal is the sum of the capacitance connected to the two pins, the internal parasitic capacitance and the capacitance introduced by the layout. If the matching is appropriate, the frequency offset will be smaller. Of course, the actual individual differences need to be adjusted appropriately. The specific calculation formula has been given above, but for the load capacitance of the crystal oscillator =[(Cd * Cg)/(Cd Cg)] Cic △C, Cd,Cg is the capacitance connected to the two legs of the crystal oscillator and to ground respectively, Cic (internal capacitance of integrated circuit) △C (capacitance on PCB). That is to say, if the load capacitance is 15pf, the two sides are connected to 27pf. Generally, A is the Cic mentioned in 6.5 ~ 13.5pF. Personally, I understand that it should be the parasitic capacitance between the chip leads inside the crystal. This capacitance is generally large at 7pf (the value given by the datasheet) and actually at 3 ~ 5pF. This value should be taken into account when calculating the values of the two external capacitors.

The resistance value of the resistor connected between the two pins of the crystal is generally several megohms. The principle is also mentioned kinpoagilent. In actual batch product application, if there is no easy vibration, it is generally effective, but in most cases, it is not necessary to have it inside the IC.

As to whether the crystal shell needs to be grounded during production, there is no difference from the perspective of mass production and shipment of our products. When visiting the crystal manufacturer, there is a product that specially places an insulating pad on the crystal shell to separate the crystal from the board. It is said that there is such a requirement from the customer. I wonder if grounding has a clear influence. We can discuss it.

When some crystals are in use, a resistor will be connected in series on the crystal input pin XI, with a resistance value of tens to hundreds of ohms. Some people say that the input level is improved, and the frequency offset accuracy will be affected during actual debugging. I don't know that expert is familiar with this, please give me more advice.

When designing, the bottom of the crystal and the input and output leads should generally be as complete as possible.

Crystal placed in the equipment what position is better?

None

Crystal placed in the equipment what position is better?

None